
Senior DFT Engineer
NVIDIA
full-time
Posted on:
Location Type: Office
Location: Tel Aviv • Israel
Visit company websiteExplore more
Job Level
Tech Stack
About the role
- In charge of state of the art Design for Test/ATPG flows and implementation
- Take ownership end to end on a project, from Arch & planning to implementation, verification and post Silicon bring up.
- Inventing and maintaining automation flows that provide the short test time to production
Requirements
- 5+ years of hands on DFT/ATPG or Physical Design experience
- Knowledge & technical experience in DFT ASIC Design and in ATPG tools
- Strong programming skills in scripting languages
- BSc. in Electrical Engineering or Computer engineering
- Quick learner, proactive and self-motivated, eager to learn and contribute, sense of ownership, commitment, and responsibility
- Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation
- Experience in Mentor TestKompress ATPG tool and retargeting flow
- Programming languages: TCL, PRL, Phyton & Unix shell scripts
- Experience with ATE and Silicon bring-up.
Benefits
- Health insurance
- Professional development opportunities
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
DFTATPGPhysical Designscripting languagesTCLPRLPythonUnix shell scriptsfault simulationon-chip scan compression
Soft Skills
quick learnerproactiveself-motivatedsense of ownershipcommitmentresponsibility
Certifications
BSc in Electrical EngineeringBSc in Computer Engineering