Senior Threat Detection Engineer
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Senior Verification Engineer – Hardware
NVIDIA
full-time
Posted on:
Location Type: Hybrid
Location: Bengaluru • 🇮🇳 India
Visit company websiteJob Level
Senior
About the role
- Creation of UVM based verification test benches and methodologies to verify complex IP's and Sub-systems
- Work on System level verification using C/C++
- Architect the testbenches and craft verification environment using UVM methodology
- Define test plans, tests and verification infrastructure for modules, clusters and system
- Build efficient and reusable bus functional models, monitors, checkers and scoreboards
- Implement functional coverage and own verification closure
- Work with architects, designers, FPGA and post-silicon teams to ensure unit robustness
Requirements
- BTech/MTech
- 5+ years of experience in verification closure of complex Unit, Sub-system or SOC level verification
- Experience in CPU verification, Memory controller verification, Interconnect verification, High Speed IO verification (UFS/PCIE/XUSB), 10G/1G Ethernet MAC and Switch
- Experience with Bus protocols (AXI/APB)
- Knowledge of System functions like Safety, Security, Virtualization and sensor processing
- Experience in latest verification methodologies like UVM/VMM
- Exposure to industry standard verification tools for simulation and debug
- Exposure to Formal verification would be excellent
- Good debugging and analytical skills
- Good interpersonal skills
Benefits
- highly competitive salaries
- comprehensive benefits package
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
UVMCC++verification closureCPU verificationMemory controller verificationInterconnect verificationHigh Speed IO verificationBus protocolsFormal verification
Soft skills
debugginganalytical skillsinterpersonal skills
Certifications
BTechMTech