Engineer I – Design, ASIC

Microchip Technology Inc.

Engineer I - Design role working on embedded control applications at Microchip Technology Inc. Responsibilities include designing, simulating, and verifying various RTL-based blocks.

Posted 5/13/2026full-timeSan Jose • California • 🇺🇸 United StatesMid-LevelSenior💰 $68,640 - $128,000 per yearWebsite

Tech Stack

Tools & technologies

LinuxPerlPython

About the role

Key responsibilities & impact

General RTL and ASIC development
Detailed module design, performance analysis and detailed design specification creation
Participate in the RTL implementation, synthesis, simulation, pre-layout/post-layout timing verification
Understanding of emerging high speed design techniques to improve Data & Command processing bandwidth, reduce latencies & increase reliability
Support porting the design into test chips and emulation platforms – experience with FPGA design and board implementation tools is advantageous

Requirements

What you’ll need

Bachelor’s in Electrical Engineering, Computer Engineering or Computer Science
Design courses and practical application of course learning for high-speed RTL design
Experience with RTL Design tools that include design entry, synthesis, formal verification, RTL/gate level simulation, cross-domain clocking analysis and static timing analysis
Course and Practical usage in RTL design, design verification, synthesis & formality
Proficiency in SystemVerilog development languages
Course and Practical usage in Static Timing Analysis and Verilog simulation tools
Should be able to design complex state machines & data path logic
Proficiency in scripting languages (TCL / Perl / Python) and LINUX
Ability to understand and implement industry standards
Ability to write detailed design specifications
Good analytical, oral and written communication skills
Able to write clean, readable presentations
Self-motivated, proactive team player
Ability to work to schedule requirements
Preferred Master’s in Electrical Engineering, Computer Engineering or Computer Science
FPGA and ASIC System On Chip Design Experience
Lab Experience for system-level validation

Benefits

Comp & perks

Health benefits that begin day one
Retirement savings plans
Industry leading ESPP program with a 2 year look back feature
Quarterly bonus payments

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

RTL developmentASIC developmentSystemVerilogStatic Timing AnalysisVerilog simulationsynthesisformal verificationcross-domain clocking analysisFPGA designdesign verification

Soft Skills

analytical skillsoral communicationwritten communicationself-motivatedproactiveteam playerability to work to schedule requirementsability to write detailed design specificationsability to design complex state machinesability to understand and implement industry standards

Certifications

Bachelor’s in Electrical EngineeringBachelor’s in Computer EngineeringBachelor’s in Computer ScienceMaster’s in Electrical EngineeringMaster’s in Computer EngineeringMaster’s in Computer Science