Principal Engineer – Analog Design, RF

Microchip Technology Inc.

Principal RFIC Engineer designing RF CMOS blocks for Microchip’s Bluetooth, Wi-Fi, and UWB products. Leading schematic, layout, validation, and silicon debugging.

Posted 9/4/2026full-timeHeilbronn • 🇩🇪 GermanyLeadWebsite

Core Competencies

Role fit

Core Competencies

Use this summary to align your resume positioning with the role.

Expertise in RF/Analog CMOS IC design, including RF TX/RX chain and PLL/Synthesizer design, with a strong focus on performance optimization and validation. Proficient in schematic design, simulation, and collaboration with cross-functional teams to ensure product specifications are met.

Highest-signal resume keywords

RF/Analog CMOS IC DesignRF TX/RX Chain DesignCadence VirtuosoIC Test and DebugProduct-Level Tape-Out Experience

ATS Keywords

Tailor your resume

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills

RF Synthesizer DesignVCO DesignLO GenerationBaseband Block DesignBiasing Circuit DesignSchematic DesignSimulation CorrelationDevice Non-IdealitiesOn-Chip Matching NetworksIC Layout Understanding

Soft Skills

CollaborationSupervisionProblem-Solving

Tools & Technologies

Spectrum AnalyzersNetwork AnalyzersSignal GeneratorsOscilloscopesSpectre/SpectreRFPeakView

Certifications & Qualifications

Ph.D. in Electrical EngineeringM.S. in Electrical Engineering

Industry Keywords

BluetoothWi-FiUWBRFIC DesignTape-OutTransistor ModelingReliability ConstraintsParasiticsCross-TalkIsolation Techniques

About the role

Key responsibilities & impact

Design RFIC blocks and modules for Bluetooth, Wi-Fi, UWB, and other wireless products
Design RF synthesizers, VCOs, LO generation, transmitter and receiver chains, baseband blocks, and biasing circuits
Own schematic design and simulation to meet performance, area, and power targets
Supervise and review layout, collaborating with layout engineers on floor planning, device matching, routing, shielding, and ESD strategies
Translate top-level radio and product requirements into block-level budgets and circuit specifications with the system design team
Supervise validation and debug, including lab bring-up, bench measurement, simulation correlation, and root-cause analysis of silicon issues
Collaborate with foundry technology teams on PDKs, models, transistor and passive device modeling, and reliability constraints

Requirements

What you’ll need

Ph.D. in Electrical Engineering or related field with 5+ years of industry experience in RF/Analog CMOS IC design, or M.S. with 7.5+ years of experience
Experience in RF TX/RX chain design and/or RF PLL/Synthesizer design
Extensive product-level tape-out experience
Deep understanding of RF-Analog IC design
Deep understanding of CMOS transistors and inductor physics, including noise, linearity, device non-idealities, parasitics, and on-chip matching networks
Deep understanding of IC layout and packaging effects on circuit performance, including parasitics, cross-talk, supply/ground/substrate noise coupling, and isolation techniques
Experience in IC test and debug
Hands-on experience with RF lab equipment, including spectrum/network analyzers, signal generators, and oscilloscopes
Proficiency with Cadence Virtuoso, Spectre/SpectreRF, and PeakView or similar EM tools for passive/inductor/package modeling
Willingness to travel 0%–25%

Benefits

Comp & perks

Employee development and career growth programs, including Leadership Passage Programs
Company perks
Culture supporting growth and stability
Diversity and workplace excellence initiatives
Values-based decision making and strong sense of community