Jobs2web

ASIC and Logic Design Engineering Manager

Jobs2web

full-time

Posted on:

Location Type: Office

Location: North ReadingMassachusettsUnited States

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Salary

💰 $155,500 - $248,700 per year

Job Level

About the role

  • Lead a team of developers in designing and verifying FPGA’s for Teradyne Compute Test Division’s next generation products.
  • Requires close collaboration with the other FPGA design and verification managers and with other engineering disciplines.
  • Lead multiple simultaneous FPGA or digital IP development projects.
  • Planning and tracking of project schedule and budget.
  • Manage project staffing levels including both full time and contract resources.
  • Contribute to FPGA implementation (i.e. code RTL blocks) as needed.
  • Provide technical support for HW sustaining issues.
  • Set goals, provide coaching and manage compensation of a 4-6 person team.

Requirements

  • BSEE or MSEE and 12+ years of relevant experience in Digital FPGA design and integration (Digital ASIC experience is a plus).
  • Minimum of 5 years of experience as an FPGA/ASIC project lead, driving multiple projects from concept, architecture exploration, design implementation and lab validation to production release.
  • Extensive experience coding RTL (verilog preferred).
  • Extensive experience using digital simulation tools (Cadence preferred).
  • Extensive experience using static timing analysis tools.
  • Experience designing with the following: PCIe, DDR3/4/5, AXI, ethernet, SPI, SERDES
  • Experience with either AMD or Altera FPGAs and development tools (Vivado/Quartus), preferably both.
  • Experience using digital design quality tools e.g. LINT, CDC.
  • Experience with bug tracking tools (Jira etc.)
  • Experience with source control systems (Clearcase, Git, CVS) and continuous integration.
  • Familiarity with digital verification tools and methodologies (preferably UVM).
  • Experience with project scheduling tools (e.g. Microsoft project)
  • Experience with embedded processors and digital signal processing is a plus.
  • Experience with high level programming languages (C, C++) is a plus.
  • Excellent presentation and communication skills.
Benefits
  • medical
  • dental
  • vision
  • Flexible Spending Accounts
  • retirement savings plans
  • life and disability insurance
  • paid vacation & holidays
  • tuition assistance programs
  • discretionary bonus(es) based on financial performance
Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools
FPGA designFPGA verificationRTL codingVerilogDigital ASIC designDigital simulation toolsStatic timing analysisDigital design quality toolsEmbedded processorsDigital signal processing
Soft Skills
LeadershipCoachingProject managementCollaborationCommunicationGoal settingStaff managementBudget managementSchedulingTechnical support
Certifications
BSEEMSEE