Verification Engineer
FortifyIQ
full-time
Posted on:
Location Type: Remote
Location: United States
Visit company websiteExplore more
Tech Stack
About the role
- Understand chip and subsystem architecture.
- Develop, maintain, and extend UVM-based verification environments.
- Write test plans, test cases, and sequences for block- and chip-level verification.
- Debug design issues based on architectural specifications.
- Work with design and architecture teams to meet quality and schedule goals.
Requirements
- BSEE/MSEE or equivalent in Electrical Engineering, Computer Science, or a related field.
- Proficient in Verilog/SystemVerilog and UVM.
- Comfortable working in Linux and with industry-standard EDA tools.
- Solid grasp of verification methodologies and design processes.
- Excellent teamwork and communication skills.
- Experience with functional and code coverage analysis.
- Strong problem-solving and analytical skills.
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
VerilogSystemVerilogUVMverification methodologiesfunctional coverage analysiscode coverage analysisdebuggingtest planstest casessequences
Soft skills
teamworkcommunicationproblem-solvinganalytical skills
Certifications
BSEEMSEE