Factorial

Junior Digital Design Engineer

Factorial

full-time

Posted on:

Location Type: Hybrid

Location: Barcelona • Spain

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Job Level

Junior

Tech Stack

PerlPython

About the role

  • Write RTL code for specific/generic IP starting from IP specification.
  • Validate the IP to ensure it meets the specification requirements.
  • Write the final design documentation ensuring the easy integration of the IP inside a complex SoC.
  • Work in tight collaboration with emulation, verification, and validation development teams to ensure bug free design.
  • Work with post-silicon validation, manufacturing, platform, and software stakeholders throughout the product development.

Requirements

  • Master's degree in Electronics/Electrical Engineering, Computer Engineering, Computer Science, or in a related field
  • 1-3 years of experience in Silicon development
  • Good knowledge of u-processor architecture, bus architecture, SOC design, Test architecture/implementation
  • Deep knowledge of Digital design from RTL to GDSII
  • RTL writing, Synthesis, static timing analysis, formal verification, scan insertion and ATPG
  • Very Good knowledge of HW description language: Verilog, SystemVerilog, VHDL
  • Good style for RTL coding and linting checks
  • Good knowledge of clock/reset synchronization
  • Good knowledge of power management and UPF description
  • Good knowledge of scripting language: TCL
  • Knowledge of Network on chip architecture RiscV ISA/architecture and SOC based on this processor (preferred)
  • Knowledge of high level (architecture) digital design language (preferred)
  • Knowledge of architecture analysis tools used metric analysis (preferred)
  • Good knowledge of scripting languages: Perl, Python (preferred)
Benefits
  • Join an innovative team and experience company growth.
  • Flexible schedule.
  • Remuneration that values your experience.
  • Hybrid work environment.
  • Opportunities for career growth and development.

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard skills
RTL codingDigital designSynthesisStatic timing analysisFormal verificationScan insertionATPGHW description languageVerilogSystemVerilog
Soft skills
CollaborationDocumentationProblem-solving
Certifications
Master's degree in Electronics/Electrical EngineeringMaster's degree in Computer EngineeringMaster's degree in Computer Science