Factorial

Physical Design Manager, Engineer

Factorial

full-time

Posted on:

Location Type: Hybrid

Location: Roma • Italy

Visit company website

Explore more

✨ AI Apply
Apply

Job Level

SeniorLead

Tech Stack

PerlPython

About the role

  • As a Physical Design Manager Engineer, you will serve as the technical reference point for the most complex digital blocks.
  • Drive the entire implementation flow (Floorplanning, P&R, Clock Tree Synthesis) with a 'constraint-driven' approach.
  • Anticipate routing and timing bottlenecks.
  • Analyze, clean, and regenerate timing constraints at every stage, ensuring they reflect both the physical reality of the silicon and the functional requirements.
  • Manage complex timing closures and drive ECO strategies.
  • Oversee Signal Integrity (SI) and Power Integrity analysis.

Requirements

  • Experience: 10+ years in the semiconductor industry with a focus on Physical Design and Digital Implementation.
  • Constraint Mastery: Expert knowledge of the SDC format and the ability to write and debug complex constraints for multi-mode/multi-corner (MMMC) designs.
  • Timing Closure: Solid experience in STA (PrimeTime/Tempus), CDC (Clock Domain Crossing) analysis, and managing hold/setup violations in advanced technology nodes or critical automotive contexts.
  • Scripting: Excellent automation skills (Tcl, Python, Perl) for report analysis and massive data flow management.
  • Previous experience in a digital environment.
  • Background in Process Integration or knowledge of yield topics (Yield/DFM) and Failure Analysis.
  • Experience with Automotive chips (ISO 26262) or Low Power design (UPF/CPF).
Benefits
  • Join a highly innovative microelectronics company working at the forefront of RISC-V and advanced SoC technologies.
  • Opportunity to play a key technical leadership role bridging industry and public research.
  • Collaboration with top-tier research institutions and industrial partners across Europe.
  • Flexible working conditions and hybrid work environment.
  • Competitive remuneration aligned with seniority and expertise.

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard skills
Physical DesignDigital ImplementationFloorplanningPlace & Route (P&R)Clock Tree SynthesisStatic Timing Analysis (STA)Clock Domain Crossing (CDC)Scripting (Tcl, Python, Perl)Signal Integrity (SI) analysisPower Integrity analysis
Soft skills
Technical reference pointProblem-solvingAnalytical skillsProject management
Certifications
ISO 26262