Director, HBM RTL Design, Integration

Eightfold

Director of HBM RTL Design and Integration at Micron driving innovative memory solutions. Leading SoC design teams to deliver next-generation HBM SoC logic die with a focus on RTL development.

Posted 5/28/2026full-timeRichardson • California, Texas • 🇺🇸 United StatesLead💰 $177,000 - $348,000 per yearWebsite

Tech Stack

Tools & technologies

AssemblyPython

About the role

Key responsibilities & impact

Lead SoC RTL design and integration for HBM logic die, including subsystem partitioning, IP integration, and SoC-level design convergence.
Drive translation of architectural and micro-architectural specifications into robust, high-quality RTL implementations across multiple teams.
Oversee SoC integration aspects, including clocking, reset, power intent, configuration infrastructure, and system-level design correctness.
Establish design methodologies and best practices to improve quality, reuse, and development efficiency across HBM programs.
Partner with SoC Architecture, Verification, Physical Design, Firmware, and System teams to ensure successful end-to-end product execution.
Work closely with Product Engineering, Test, Probe, Process Integration, Assembly, and Manufacturing to ensure robust, manufacturable HBM solutions.
Drive trade-offs among performance, power, area, schedule, and risk to ensure optimal product outcomes.
Build, lead, and scale a high-performing RTL design and integration team, including recruiting, mentoring, and retention of top engineering talent.

Requirements

What you’ll need

15+ years of relevant SoC design experience with increasing scope and technical leadership.
Proven experience leading large-scale SoC design teams delivering complex SoCs to advanced process nodes (e.g., TSMC).
Deep expertise in RTL design, SoC integration, and full RTL-to-GDS flows, including synthesis, timing, and signoff considerations.
Strong experience integrating complex IP subsystems (controllers, NOC, microcontrollers, PHY-adjacent logic, RAS, MBIST, interfaces).
Familiarity with EDA tools and scripting languages (e.g., SystemVerilog, Python, TCL).
Knowledge of DRAM/HBM systems and JEDEC standards preferred.

Benefits

Comp & perks

Health insurance
Dental and vision plans
Paid family leave
Paid time-off
Paid holidays

ATS Keywords

✓ Tailor your resume

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools

SoC designRTL designIP integrationfull RTL-to-GDS flowssynthesistimingsignoffcomplex IP subsystemsDRAM systemsHBM systems

Soft Skills

technical leadershipteam buildingmentoringcollaborationproblem-solvingtrade-off analysiscommunicationproject managementrecruitingretention