Staff Engineer – ASIC Verification

Eightfold

Staff ASIC Design Verification Engineer in semiconductor industry developing advanced verification environments for complex SoC components. Key role with architecture and development while ensuring best-in-class quality in the verification process.

Posted 5/23/2026full-timeSan Jose • California • 🇺🇸 United StatesLead💰 $145,000 - $286,000 per yearWebsite

About the role

Key responsibilities & impact

Define, develop, debug and improve new innovative Design verification environments
Relevant and hands-on experience with development of test benches, verification plans, test-plans and coverage definitions for complex IPs, Sub-systems and SoCs
Interacting with architecture, FW and design teams to debug and resolve critical issues

Requirements

What you’ll need

B.S. in electrical engineering, computer science or equivalent with extensive industry experience
6-8 years of deep verification exposure
Experience with RTL debugging, score boarding and code coverage analysis
Proven expertise with writing and tracking detailed test-plans at all levels.
Hands-on experience with DDR, PCIe/NVMe or NAND interfaces is an advantage
Expert level with System-Verilog and UVM methodologies
Familiarity with C is an advantage
Exposure to gen-AI tools (Claude-Code, others) is an advantage
Exposure to emulation is an advantage

Benefits

Comp & perks

Health insurance
401(k) matching
Paid family leave
Paid time-off program
Paid holidays

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

design verificationtest benchesverification planstest-planscoverage definitionsRTL debuggingscore boardingcode coverage analysisSystem-VerilogUVM methodologies

Certifications

B.S. in electrical engineeringB.S. in computer science