Design Verification Engineer

Eightfold

Design Verification Engineer at Micron overseeing pre-silicon functional verification of high-speed interface chip. Collaborating with a senior team to build verification environments and ensure clean handoff from simulation to silicon.

Posted 4/30/2026full-timeMinneapolis • California, Idaho, Minnesota, Texas • 🇺🇸 United StatesMid-LevelSenior💰 $178,000 - $389,000 per yearWebsite

About the role

Key responsibilities & impact

Define and execute the full-chip DV plan including coverage targets and sign-off criteria
Build and maintain UVM/SystemVerilog testbenches for soft IP and top-level integration
Develop directed and constrained-random tests and close functional and code coverage
Apply assertions and formal methods for control logic, CSR correctness, and CDC checks
Support post-silicon bring-up with debug data, test vectors, and documentation

Requirements

What you’ll need

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
6–12 years of functional verification experience using UVM and SystemVerilog
Proven experience building DV environments from scratch
Strong coverage-driven verification and debug skills
Experience verifying management or control interfaces such as I2C, SPI, APB, or AHB

Benefits

Comp & perks

Choice of medical, dental and vision plans
Programs that protect your income if unable to work due to illness or injury
Paid family leave
Robust paid time-off program
Paid holidays

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

UVMSystemVerilogfunctional verificationcoverage-driven verificationdebug skillsdirected testsconstrained-random testsassertionsformal methodscontrol logic

Certifications

Bachelor’s degree in Electrical EngineeringBachelor’s degree in Computer Engineering