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Eightfold

Staff Physical Design Engineer

Eightfold

Staff Physical Design Engineer designing high-speed interface chips at Micron Technology. Responsible for full physical design flow, from synthesized netlist to GDSII with a focus on timing and power integrity.

Posted 4/30/2026full-timeMinneapolis • California, Idaho, Minnesota, Texas • 🇺🇸 United StatesLead💰 $178,000 - $389,000 per yearWebsite

About the role

Key responsibilities & impact
  • Define and implement full-chip floorplans in collaboration with analog and digital teams
  • Execute place and route, timing closure, and ECOs through final sign-off
  • Own static timing, power integrity, and physical verification closure
  • Integrate scan and support DFT and ATPG execution
  • Coordinate with foundry and document PD decisions for follow-on designs

Requirements

What you’ll need
  • Bachelor’s degree in Electrical Engineering or related field
  • 8+ years of physical design experience with at least one full chip tape-out
  • Hands-on expertise with Cadence Innovus and Tempus
  • Experience closing DRC, LVS, and ERC using Calibre
  • Proven ability to own PD decisions and drive issues to closure on small teams

Benefits

Comp & perks
  • Health insurance
  • Dental plans
  • Vision plans
  • Paid family leave
  • Paid time-off program
  • Paid holidays

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools
full-chip floorplansplace and routetiming closureECOsstatic timingpower integrityphysical verificationDFTATPGDRC
Soft Skills
ability to own PD decisionsdrive issues to closurecollaborationcoordination