Principal Engineer, CPIE RAM Detection Strategy
Eightfold
full-time
Posted on:
Location Type: Office
Location: Taichung • 🇹🇼 Taiwan
Visit company websiteJob Level
Lead
About the role
- Collaborate with NAND and DRAM sites
- Develop and optimize detection strategies
- Improve product yield, quality, and cost
- Ensure alignment of RAM Standardization across sites
Requirements
- Experience in process integration
- Knowledge of RAM Detection performance and costs
- Collaboration with cross-functional teams
- Familiarity with HVM and TD processes
Benefits
- Health insurance
- Retirement plans
- Professional development opportunities
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
process integrationRAM Detection performanceHVM processesTD processes
Soft skills
collaborationcross-functional teamwork