A Master’s or Bachelor’s degree in electronic/electrical engineering or computer science
8+ years of experience in RTL Digital Design
Experience in TL, microarchitecture, and architecture with advanced microprocessors and/or SOCs
Strong microarchitecture and logic design experience, including high-speed deep sub-micron design and techniques for low power management
A solid understanding of computer architecture
Knowledge of physical timing in silicon devices and timing constraints for industry-standard EDA tools
Familiarity with design tools for simulation, debugging, synthesis, timing analysis, and front-end RTL checking tools (like Lint, CDC/RDC, LEC, etc.)
Experience with ASIC design techniques, pipelines, and basic CPU microarchitecture
Experience in synthesis, physical layout concepts, static timing analysis, and clock domain crossing
Proficiency in Verilog and System Verilog
Strong skills in Unix and scripting languages such as make, Shell, Perl, or Python

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools

RTL Digital Designmicroarchitecturelogic designhigh-speed deep sub-micron designlow power managementcomputer architectureASIC design techniquesstatic timing analysisVerilogSystem Verilog