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Broadcom

Senior Digital VLSI Design Engineer

Broadcom

Senior Digital VLSI Design Engineer at Broadcom designing complex IPs for SOC teams. Engaging in synthesis, DFT, CDC, and RDC sign-off for high-speed applications.

Posted 7/13/2026full-timeFort Collins • California, Colorado • 🇺🇸 United StatesSenior💰 $121,900 - $195,000 per yearWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates deep expertise in Digital VLSI Design, focusing on Synthesis, DFT, CDC, and RDC methodologies. Proven ability to mentor teams and enforce best practices while collaborating with architecture and chip leads to ensure design testability.

Highest-signal resume keywords
Synthesis ExpertiseDFT MethodologyClock Domain Crossing (CDC)Reset Domain Crossing (RDC)Structural and Functional Verification

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
SynthesisDesign For Test (DFT)Clock Domain Crossing (CDC)Reset Domain Crossing (RDC)High-Speed InterfacesSerDesLPDDR5/6DDR4/5HBM
Soft Skills
MentoringCollaboration
Tools & Technologies
SpyGlass CDC/RDCSpyglass LintJasperGoldMeridian
Certifications & Qualifications
BSEEMSEEPhD
Industry Keywords
Digital VLSI DesignVerificationMulti-Clock DomainsConstraint CreationAutomated Flows

About the role

Key responsibilities & impact
  • Senior Digital VLSI Design Engineer with deep expertise in Synthesis, DFT, CDC and RDC sign-off
  • Responsible for defining and enforcing synchronization strategies across complex, multi-clock domains
  • Own the constraint creation process for synthesis, full-chip CDC/RDC methodology
  • Collaborate closely with Architecture and Chip Lead teams to review testability and DFT design early in the design cycle
  • Mentor the broader design team on Synthesis, DFT, CDC/RDC best practices and drive automated flows

Requirements

What you’ll need
  • BSEE required, MSEE/PHD preferred
  • 8+ years of related experience
  • Deep expertise in Synthesis, DFT, Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC)
  • Mastery of structural and functional verification of crossings using industry-standard tools (e.g., SpyGlass CDC/RDC, Spyglass Lint, JasperGold, or Meridian)
  • Experience with high-speed interfaces such as SerDes, LPDDR5/6, DDR4/5 or HBM

Benefits

Comp & perks
  • Medical, dental and vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Company paid holidays
  • Paid sick leave and vacation time
  • Paid Family Leave and other leaves of absence