Senior ASIC DV Engineer

Broadcom

Senior ASIC DV Engineer at Broadcom contributing to development of SOCs for Touch Controllers and Wireless Charging Chips. Architecting verification environments and developing test plans for complex projects.

Posted 5/27/2026full-timeSan Jose • California • 🇺🇸 United StatesSenior💰 $141,300 - $226,000 per yearWebsite

About the role

Key responsibilities & impact

Contribute to the development of complex SOCs targeted towards Touch Controllers/Wireless Charging Chips
Architecting block and full-chip verification environments using HVLs (UVM) and constrained random techniques
Developing test plans and coverage metrics from specifications
Writing diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC
Debugging RTL and Gate simulations and work with design engineers to verify fixes
Evaluating latest verification methodologies and developing scripts to automate verification flows

Requirements

What you’ll need

Bachelors and 12+ years of related experience; or Masters degree and 10+ years of related experience; or PhD and 7+ years of related experience
Experience understanding and verifying low power silicon for mobile applications
Good knowledge of UPF low power verification flow

Benefits

Comp & perks

Medical, dental and vision plans
401(K) participation including company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
company paid holidays
paid sick leave and vacation time

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

SOC developmentUVMconstrained random techniquestest planscoverage metricsFPGA validationASIC validationRTL debuggingGate simulationslow power silicon verification