RTL Design Sign Off Lead

Broadcom

Senior Digital VLSI Design Engineer at Broadcom responsible for synchronization strategies and verification in complex IPs. Mentoring and collaborating with architecture teams for high-speed designs.

Posted 5/14/2026full-timeFort Collins • California, Colorado • 🇺🇸 United StatesSenior💰 $108,000 - $172,800 per yearWebsite

About the role

Key responsibilities & impact

Define and enforce synchronization strategies across complex, multi-clock domains
Own the constraint creation process for synthesis, full-chip CDC/RDC methodology
Collaborate closely with Architecture and Chip Lead teams
Mentor the broader design team on Synthesis, DFT, CDC/RDC best practices

Requirements

What you’ll need

BSEE required, MSEE/PHD preferred
8+ years of related experience
Mastery of structural and functional verification of crossings using industry-standard tools (e.g., SpyGlass CDC/RDC, Spyglass Lint, JasperGold, or Meridian)
Experience with high-speed interfaces such as SerDes, LPDDR5/6, DDR4/5 or HBM

Benefits

Comp & perks

Medical, dental and vision plans
401(K) participation including company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
Company paid holidays
Paid sick leave and vacation time

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

synthesisDFTCDCRDCstructural verificationfunctional verificationhigh-speed interfacesSerDesLPDDR5DDR4

Soft Skills

collaborationmentoring

Certifications

BSEEMSEEPhD