Boeing

ASIC/FPGA Design and Verification Engineer – Lead, Senior or Principal

Boeing

full-time

Posted on:

Location Type: Office

Location: Tukwila • Washington • 🇺🇸 United States

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Salary

💰 $126,650 - $257,600 per year

Job Level

Senior

Tech Stack

LinuxPerlPythonSubversion

About the role

  • Lead FPGA/ASIC designs, including multi-FPGA/ASIC programs and teams, and manage team execution to meet program milestones.
  • Collaborate with customers, system engineers, and hardware engineers to drive requirements capture and architect digital logic functions.
  • Explore trade-space of potential ASIC/FPGA technologies and determine optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance.
  • Implement FPGA/ASIC from block-level micro-architecture through HDL coding and physical design realization (through gate-level netlists for ASIC designs).
  • Integrate DSP IP from Boeing’s algorithm team and third-party IP as needed.
  • Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensure timely completion.
  • Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation.
  • Create self-checking and reusable test benches from scratch, applying OOP concepts and leverage UVM to create drivers, monitors, predictors, and scoreboards.
  • Drive FPGA-based prototyping and validation depending on program and system requirements.
  • Validate design through hardware integration test with special test equipment, test-beds, and higher-level systems as needed.
  • Train and mentor less senior engineers and help build effective project teams.
  • Track and report progress to stakeholders and manage program-level execution.

Requirements

  • Bachelor of Science degree from an accredited course of study in engineering, engineering technology, chemistry, physics, mathematics, data science, or computer science (Bachelor's Degree or Equivalent).
  • 5+ years of ASIC/FPGA design or verification experience.
  • Experience with ASIC/FPGA architectural definition, and detailed design implementation and functional verification using SystemVerilog with delivery/release of production designs.
  • Professional experience with hardware-based integration and test of ASIC/FPGA designs.
  • Proven record of leading ASIC/FPGA design and/or verification teams, including tracking and reporting progress to stakeholders.
  • Ability to obtain U.S. Security Clearance (U.S. Citizenship required) and meet export control compliance as a U.S. Person.
  • Employer will not sponsor applicants for employment visa status.
  • Preferred: 10+ years related work experience or equivalent combination of education and experience; Master's Degree in EE, Computer Engineering/Science, or related field.
  • Preferred: Experience with hardware emulators (especially Palladium).
  • Proficiency with hardware verification languages: System Verilog, System Verilog Assertions.
  • Ability to execute test plans.
  • Proficiency with Object Oriented Programming concepts (Inheritance, Polymorphism).
  • Ability to create self-checking and reusable testbenches from scratch and leverage UVM.
  • Experience developing Functional Coverage Models and closing Code Coverage.
  • Experience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet).
  • Proficient in scripting languages: Make, Perl, Python.
  • Experience with revision control systems: svn, cvs, git.
  • Proficient in Linux environments.
  • Familiarity with space-based design techniques and radiation mitigation.
  • Demonstrated history of 1st pass success with ASIC designs.
Benefits
  • This position offers relocation based on candidate eligibility.
  • Opportunity to enroll in a variety of benefit programs, generally including health insurance.
  • Flexible spending accounts.
  • Health savings accounts.
  • Retirement savings plans.
  • Life and disability insurance programs.
  • A number of programs that provide for both paid and unpaid time away from work.
  • Competitive base pay and variable compensation opportunities.
  • Employee referral eligible for bonus.

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard skills
FPGA designASIC designSystemVeriloghardware integrationstatic timing analysisFunctional Coverage ModelsCode CoverageObject Oriented ProgrammingUVMhigh-speed Serdes interfaces
Soft skills
leadershipmentoringcollaborationcommunicationproject management
Certifications
Bachelor's DegreeMaster's Degree