Mechanical Engineer

• Provide technical direction and design implementation for mixed-signal circuit
• Collaborate closely with physical design teams
• Experience with modeling and simulation of ICs using HSPICE/finesim
• Contribute to defining, developing, and analyzing mixed-signal circuits
• Work on novel concept development, circuit simulation, optimization, and floor planning

Principal Memory Design Engineer – Pathfinding

• Provide small-scale mechanical design elements for federal engineering projects using fundamental knowledge, standard techniques, and established methods for small to mid-sized projects.
• Perform basic plan production and receive direction on assigned tasks, including drafting and detailing mechanical components for construction documents.
• Develop and apply knowledge and experience working within design/modeling software to support project deliverables.
• Assist with preparation of project documentation and schedules; perform design calculations within a limited scope and under guidance of senior engineers.
• Support mechanical system design and documentation for federal facilities, which may include HVAC and plumbing from concept through construction.
• Assist with load calculations and mechanical system sizing; support development of design narratives and technical reporting as needed.
• Coordinate with experienced engineers and designers on non-routine techniques and procedures; collaborate with other disciplines to support integrated design.
• Gather research, recommend solutions, and create drafts of technical reports using prescribed methods and internal standards.
• Mentor student interns by providing opportunities to develop foundational technical skills and knowledge; may supervise student staff as needed.
• May travel and work in various terrains and weather conditions at project sites in different stages of construction.

Associate Mechanical Engineer – Federal Engineering and Design

• Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits
• Performing circuit modeling, sensitivity analyses, and assisting in developing validation through widely recognized simulation software and tools
• Designing on-silicon test chips and leading required tape-out revisions
• Coordinating and collaborating with the layout team, including floor-planning, placement, and routing
• Performing verification processes with modeling and simulation using industry-standard simulators

SMTS Design Engineer, Pathfinding

• Define and implement full-chip floorplans in collaboration with analog and digital teams
• Execute place and route, timing closure, and ECOs through final sign-off
• Own static timing, power integrity, and physical verification closure
• Integrate scan and support DFT and ATPG execution
• Coordinate with foundry and document PD decisions for follow-on designs

Staff Physical Design Engineer

• Define chip-level digital architecture and integrate hard macros with soft IP
• Own RTL design for control logic, registers, clocking control, and top-level integration

Principal Digital Design Engineer / Chip Lead

• Design custom analog blocks with a primary focus on PLL, DLL, and clock recovery circuits
• Contribute to PHY-level analog architecture and performance trade-off decisions
• Build and run transistor-level simulations including corner and mismatch analysis
• Partner with layout and digital teams to define clean mixed-signal interfaces
• Support silicon bring-up and correlate measurements to simulation results

Principal Analog Design Engineer – Mixed-Signal PHY, Clocking, High-Speed I/O

• Contribute to the development of new product opportunities by assisting with overall design, layout, and optimization of Memory/Logic/Analog circuits
• Perform circuit modeling, sensitivity analyses, and assist in developing validation through simulation software and tools
• Design on-silicon test chips and lead required tape-out revisions
• Coordinate and collaborate with the layout team, including floor-planning, placement, and routing
• Perform verification processes with modeling and simulation using industry-standard simulators

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