Hardware Engineer

• Collaborate with senior IPT Leadership, Program Management, Engineering, Supply Chain, Quality, and Operations to plan and execute sustainment strategy
• Apply disciplined program management processes and utilize tools to monitor metrics and trends
• Balance cost and schedule while ensuring product compliance with contract
• Generate Work Instructions based on hardware upgrades
• Provide troubleshooting assistance to field personnel.

LTAMDS Deployment, Fielding and Sustainment Hardware Engineer

• Define, build, and enhance FPGA-based prototyping platforms
• Utilize rapid FPGA prototyping techniques to validate the technical feasibility of algorithmic subsystems
• Familiarity with computer architectural techniques for enabling high-throughput, resource-efficient acceleration
• Build vendor-neutral FPGA/RTL designs intended to prototype ASIC implementations
• Coordinate with 3rd party vendors for software, firmware, and IP cores
• Create FPGA interface documentation for hardware/software interfaces
• Collaborate in a team environment spanning various technical domains.

FPGA Engineer

• Design schematic capture and multilayer PCB layouts for embedded and autonomous systems
• Develop electronics for computing, sensing, power management, communications, and control subsystems
• Support component selection, bring-up, debugging, validation, and integration of custom hardware designs
• Perform board-level testing, signal integrity analysis, power validation, and hardware troubleshooting
• Create and maintain design documentation, schematics, BOMs, test procedures, and revision control workflows
• Contribute to the continuous improvement of engineering processes, validation infrastructure, and hardware reliability practices

Hardware Engineer – PCB

• Develop the next generation of low-power and high-performance optical transceivers
• Bring-up and optimization of each new coherent transceiver design
• Provide guidance and test results for the development of integrated optics, high speed electronics, and DSP
• Conduct design verification testing (DVT) of coherent transceivers
• Development of calibration and test procedures for consistent high transceiver performance
• Work with operations team for high volume manufacturing
• Maximize product yield through good calibration and production test procedures
• Debug of transceivers during bring-up and volume manufacturing

Optical Hardware Engineering Technical Leader

• Lead development of DFT solutions for next-generation ASICs for multi-100G to 1.6T coherent optical communications products
• Lead implementation of SSN, hierarchical test flow DFT architectures, including scan insertion, compression/decompression logic, memory BIST, and logic BIST, using Siemens Tessent, or Synopsys, tools for RTL and gate netlist DFT implementation
• Generate and deliver ATPG test pattern for stuck-at, transition, cell aware and path delay fault models
• Drive scan-based diagnosis methodology for Silicon failure debug
• Provide post-silicon testing and validation support
• Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools
• Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems
• Perform simulation runs and debug for non-timing and back annotated timing (SDF) gate level simulations
• Develop test scripts, automate processes, and analyze data using programming languages such as Python, Tcl, or C++

ASIC Engineering Technical Lead – DFT

• Develop control algorithms for switch mode power electronics.
• Drive power electronics, communications, and battery design architecture with a firmware focus.
• Develop, enhance and debug new and existing real-time firmware in C.
• Design and implement functionality and behaviors of embedded subsystems.
• Drive firmware development for performance, scalability, robustness, and tight integration with the hardware.
• Design safety rated firmware to meet UL1998 or related standards.
• Hands-on hardware bring up, build and execute component validation to deliver robust, functional code.

Firmware Engineer II

• discover how to use new peripherals and extend the functionality of existing ones within our robotic system
• configure and program devices, including PLCs, motor controllers, and safety systems
• implement communication via Modbus, PROFIsafe, CAN, Ethernet, and similar protocols
• design clean, well-documented APIs between peripherals and Pickle's object-oriented, distributed platform
• characterize the performance of peripheral interfaces to design and implement meaningful improvements
• design and implement safety-critical features, including emergency stop mechanisms, collision-avoidance systems, and other safety-related functionality
• develop Python scripts, test harnesses, and debugging tools to verify the reliability and safety of firmware across the system
• drive design and code reviews, raising quality standards across the firmware team

Senior Firmware Engineer

• Key member of Acacia’s Hardware team contributing to the hardware life cycle of products
• Work within a multi-disciplinary hardware, software, optics, and DSP engineering organization
• Contribute to the architecture, specification, design, and validation of new hardware
• Utilize expertise in telecommunications and high-speed electro-optical transmission systems to resolve complex problems during NPI phase

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