Hardware Engineer

• Contribute to the development of key components of our networking system, including SmartNICs and hybrid optical switches.
• Responsible for designing and optimizing VHDL and/or Verilog implementations.
• Verify designs in simulation by writing test cases and scenarioʼs within a Python simulation environment.
• Integrate designs and IP cores into FPGA projects.
• Conduct timing analysis and on-target verification.
• Participate in system level performance testing and debug fixing in close collaboration with the software and networking team.

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Senior FPGA Engineer, VHDL/Verilog