Designer

• Verify ASIC/SoC functionality, performance, security, and power throughout the full chip design life cycle, from test plan definition to sign-off
• Build high quality verification environments at the chip/top and block levels following engineering best practices
• Write thorough verification documentation including test plans
• Diagnose, debug, and resolve regression failures and other errors
• Achieve coverage closure
• Ensure design functionality while upholding stringent timelines in collaboration with architecture, design, software, system, and silicon validation teams as well as engineering program managers

SoC/ASIC Design Verification Engineer

Enterprise Transformation Guide – Advisor, Connector, Design Strategist

Process Design Consultant I/II – Enterprise Credit

Manager, System Design Verification

Junior Mechanical, Piping Designer