Engineer

• Learn and analyze system-level operation of NVIDIA DPUs
• Debug and root-cause performance issues in pre-silicon environments, across RTL, waveform traces, and multi-die system simulations.
• Collaborate closely with design, verification, architecture, and performance modeling teams to isolate and fix issues.
• Develop and improve validation methodologies for performance experiments and data collection.
• Automate repetitive debug and validation tasks to scale coverage and efficiency.

Senior DPU Performance Validation Engineer

Senior Network Performance Exploration Engineer

DFT Verification Engineer

STA Engineer

SOC Clock Distribution Engineer