NVIDIA

Senior Mask Layout Design Engineer

NVIDIA

full-time

Posted on:

Location Type: Hybrid

Location: Hsinchu • 🇹🇼 Taiwan

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Job Level

Senior

Tech Stack

PerlPython

About the role

  • Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in groundbreaking sub-micron CMOS technologies using Cadence tools.
  • Work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
  • Take part in floor planning, custom layout and verifying against design rules and schematics.

Requirements

  • Have a BSEE or equivalent experience.
  • Minimum of 5+ years proven experience in Mask and Layout Design.
  • Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
  • Authority with Cadence custom circuit design tools - particularly virtuoso.
  • Experience running and debugging with verification tools such as Dracula, Hercules, Calibre, and Primeyield.
  • Proficient in scripting languages like perl, python, skill etc.
  • Knowledge of DRC and LVS checking flows, ability to customize decks.
Benefits
  • NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer.

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard skills
Mask DesignLayout DesignAnalog Circuit LayoutSubmicron CMOS TechnologiesScripting LanguagesDRC CheckingLVS Checking
Certifications
BSEE