Senior Engineering IP Program Manager
Marvell Technology
full-time
Posted on:
Location Type: Office
Location: Santa Clara • California, New York • 🇺🇸 United States
Visit company websiteSalary
💰 $163,940 - $245,600 per year
Job Level
Senior
About the role
- Understand the SoC IP needs and develop plans to deliver and support the IP from conception through to program Mass Production Release (MPR)
- Have both depth and breadth in the related IP engineering that involves cross functional organizations, in the forms of analog, logic, design for test, layout, timing, validation, PnR, etc
- Overall responsibility for program management of IP development & delivery to Marvell product business units
- Drive closure of IP specs & requirements
- Demonstrated strong cross-functional leadership to chair weekly cross functional meetings assessing status, milestones, and completeness of plans with regular program updates to Marvell Executive stakeholders
- Support Marvell’s Program Management Processes
- Matrixed leadership of engineering managers distributed across the engineering organization
- Execute lessons learned, risk management, and enforce agreed to processes
- Responsibility for the successful outcome of IP development & delivery
Requirements
- BS in Electrical Engineering with MSEE preferred
- Bachelor’s degree in Computer Science, Electrical Engineering, or related fields and 10-15 years of related professional experience, OR Master’s degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 5-10 years of experience
- 6+ years of experience as an Engineering Project Manager in the Semiconductor industry preferred
- 6+ years of experience as a mixed signal IP designer
- Preferred experience as a mixed signal design manager
- Knowledge of SoC/IC design flow for advanced process technologies and process flows and methodologies in Silicon Development
- Excellent verbal and written communication and presentation skills
- Demonstrated ability to partner with technical managers to drive projects to completion
- Demonstrated effective partnerships and relationships with key stakeholders
- Excellent leadership skills
- Must have a broad background in ASIC or other Microelectronics semiconductor product development
Benefits
- Health and financial wellbeing included in the package
- Flexible time off
- 401k
- Year-end shutdown
- Floating holidays
- Paid time off to volunteer
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
SoC designIP developmentmixed signal designASIC developmentprogram managementrisk managementvalidationtiming analysislayout designdesign for test
Soft skills
cross-functional leadershipcommunication skillspresentation skillspartnership skillsstakeholder managementorganizational skillsteam leadershipproject managementproblem-solvingcollaboration
Certifications
BS in Electrical EngineeringMSEEMaster’s degree in Computer SciencePhD in Computer Science